Global Standards for the Microelectronics Industry
Standards & Documents Search
Title | Document # | Date |
---|---|---|
RADIO FRONT END - BASEBAND (RF-BB) INTERFACE |
JESD96A | Feb 2006 |
The normative information in this standard is intended to provide a technical design team to construct the interface on a FED and a BED such that they will operate correctly with each other (at the interface level), when designed to this specification. Additional informative information is provided in the appendices to help illustrate the normative material. This document addresses the following interface topics: 1) RF-BB Electrical layer: time and amplitude specifications for lines, drivers, receivers, clocks; 2)RF-BB Link layer: bits, clock-data synchronization, power modes; 3) RF-BB Transport layer: data types, data framing, data bandwidth, connection to core IC; 4) RF-BB Interface Registers This document defines a high-speed serial link that enables the bi-directional transfer of data and control information between the FED and BED. The document does not mandate the use of specific signaling, standard framing or standard messaging needed to make this an interoperable interface standard for RF devices or BB devices. Committee(s):JC-61 Free download.Registrationorloginrequired. |
||
UNIVERSAL FLASH STORAGE (UFS), Version 3.0Status: SupersededJanuary 2020 |
JESD220D | Jan 2018 |
This document has been superseded by JESD220E, January 2020, however is available for reference only. Patents(): A complete list of Assurance/Disclosure Forms is available to JEDEC members in the Members Area. Non-members can obtain individual Assurance/Disclosure Forms on request from the JEDEC office. Committee(s):JC-64.1 Available for purchase:$355.00 Add to Cart Paying JEDEC Members mayloginfor free access. |
||
UNIVERSAL FLASH STORAGE (UFS), Version 3.1 |
JESD220E | Jan 2020 |
This document has been superseded by JESD220F, August 2022, however is available for reference only. Patents(): A complete list of Assurance/Disclosure Forms is available to JEDEC members in the Members Area. Non-members can obtain individual Assurance/Disclosure Forms on request from the JEDEC office. Committee(s):JC-64.1 Available for purchase:$355.00 Add to Cart Paying JEDEC Members mayloginfor free access. |
||
SPD Annex J: Serial Presence Detect for DDR2 SDRAM |
SPD4.1.2.10 | Jan 2007 |
Release No. 17 Free download.Registrationorloginrequired. |
||
Addendum No. 1 to JESD96A - INTEROPERABILITY AND COMPLIANCE TECHNICAL REQUIREMENTS FOR JEDEC STANDARD JESD96A - RECOMMENDED PRACTICE FOR USE WITH IEEE 802.11N |
JESD96A-1 | Jan 2007 |
The normative information in this publication is intended to provide a technical design team to construct the interface on a FED and a BED such that they will operate correctly with each other (at the interface level), when designed to JESD96A. Committee(s):JC-61 Free download.Registrationorloginrequired. |
||
EMBEDDED MULTI-MEDIA CARD (e•MMC), ELECTRICAL STANDARD (5.1) |
JESD84-B51A | Jan 2019 |
This document provides a comprehensive definition of thee•MMC Electrical Interface, its environment, and handling. It also provides design guidelines and defines a tool box of macro functions and algorithms intended to reduce design-in overhead. The purpose of this standard is the definition of thee•MMC Electrical Interface, its environment and handling. It provides guidelines for systems designers. Item 67.14. This document replaces all past versions, however links to the replaced versions are provided here for reference only:JESD84-B51, February 2015;JESD84-B50.1, July 2014 (Editorial revision of JESD84-B50);JESD84-B50, September 2013 (Revision of JESD84-B451);JESD84-B451, June 2012 (Revision of JESD84-B45, June 2011) Patents(): A complete list of Assurance/Disclosure Forms is available to JEDEC members in the Members Area. Non-members can obtain individual Assurance/Disclosure Forms on request from the JEDEC office. Committee(s):JC-64 Available for purchase:$327.00 Add to Cart Paying JEDEC Members mayloginfor free access. |
||
UNIVERSAL FLASH STORAGE, UFS 2.2 |
JESD220C-2.2 | Aug 2020 |
The purpose of this standard is definition of a UFS Universal Flash Storage electrical interface and a UFS memory device. This standard defines a unique UFS feature set and includes the feature set of eMMC standard as a subset. This standard replaces JESD220C, UFS 2.1, and introduces a feature called WriteBooster. Item 138.88. Committee(s):JC-64.1 Free download.Registrationorloginrequired. |
||
SPD Annex D, DDR Synchronous DRAM (DDR SDRAM) |
SPD4.1.2.4 | Jan 2004 |
Release No.13 Free download.Registrationorloginrequired. |
||
240-Pin PC2-5300/PC2-6400 DDR2 SDRAM Unbuffered DIMM Design Specification |
MODULE4.20.13 | May 2021 |
Release 31. Item 2167.05This revision contains terminology updates only. Committee(s):JC-45,JC-45.2,JC-45.3 Free download.Registrationorloginrequired. |
||
Universal Flash Storage (UFS), Version 2.1Status: SupersededAugust 2020 |
JESD220C-2.1 | Mar 2016 |
This document has been superseded by JESD220C-2.2, August 2020, and is provided here for reference purposes only. This standard specifies the characteristics of the UFS electrical interface and the memory device. Suchcharacteristicsinclude(amongothers)lowpowerconsumption,highdatathroughput,lowelectromagnetic interference and optimization for mass memory subsystem efficiency. The UFS electricalinterface is based on an advanced differential interface by MIPI M-PHY specification which together withthe MIPI UniPro specification forms the interconnect of the UFS interface. The architectural model isreferencing the INCITS T10 (SCSI) SAM standard and the command protocol is based on INCITS T10(SCSI) SPC and SBC standards.Item 133.00B Committee(s):JC-64.1 Free download.Registrationorloginrequired. |